Automating Customizable Computing —Democratizing Accelerator Designs at the Edge and in the Cloud
In the past decade, CDSC has been exploring customizable computing, which emphasizes extensive use of customized accelerators on programmable fabrics for much greater performance and energy efficiency. With Intel’s $17B acquisition of Altera in 2015 and large-scale deployment of FPGAs in both private and public clouds in the past two years, customizable computing is going from advanced research into mainstream computing.
Although the performance and energy efficiency benefits of customizable computing have been clearly demonstrated, a significant challenge, however, is the efficient design and implementation of various accelerators on FPGAs. It presents a significant barrier to many software programmers. In this talk, I shall talk about our effort on developing an automated compilation flow from high-level programming languages to FPGAs. I start with a quick review of our early work on high-level synthesis. Then, I shall present our recent effort on source-code level transformation and optimization for customizable computing, including support of high-level domain-specific languages (DSL) for deep learning (e.g. Caffe), imaging processing (e.g. Halide), and big-data processing (e.g. Spark), and support automated compilation to customized microarchitecture templates, such as systolic arrays, stencils, and CPP (composable parallel and pipelined).